Silicon Labs /EFR32BG21A020F1024IM32 /USART2_NS /I2SCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as I2SCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0 (MONO)MONO 0 (LEFT)JUSTIFY 0 (DMASPLIT)DMASPLIT 0 (DELAY)DELAY 0 (W32D32)FORMAT

FORMAT=W32D32, JUSTIFY=LEFT

Description

No Description

Fields

EN

Enable I2S Mode

MONO

Stero or Mono

JUSTIFY

Justification of I2S Data

0 (LEFT): Data is left-justified

1 (RIGHT): Data is right-justified

DMASPLIT

Separate DMA Request For Left/Right Data

DELAY

Delay on I2S data

FORMAT

I2S Word Format

0 (W32D32): 32-bit word, 32-bit data

1 (W32D24M): 32-bit word, 32-bit data with 8 lsb masked

2 (W32D24): 32-bit word, 24-bit data

3 (W32D16): 32-bit word, 16-bit data

4 (W32D8): 32-bit word, 8-bit data

5 (W16D16): 16-bit word, 16-bit data

6 (W16D8): 16-bit word, 8-bit data

7 (W8D8): 8-bit word, 8-bit data

Links

()